1. Field of the Invention
The present invention relates to a technique for testing an A/D converter.
2. Description of the Related Art
A/D converters are employed in order to convert an analog voltage into a digital code. An ideal A/D converter generates a digital code that changes linearly with respect to an analog voltage. However, in some cases, an actual A/D converter has a problem of conversion error. This leads to a problem in that the digital code does not linearly follow the analog voltage.
FIGS. 1A and 1B are diagrams for describing nonlinear error that occurs in a 3-bit A/D converter. The conversion characteristics of an ideal A/D converter are represented by the broken line (I). As indicated by the solid line (II) in FIG. 1A, the conversion characteristics of an actual A/D converter involve conversion error. In FIG. 1A, the digital code DOUT monotonically increases with respect to the analog voltage VIN over the entire range, and all the digital codes DOUT can be generated. In contrast, in some cases, as shown in FIG. 1B, a particular digital code DOUT cannot be generated, and the digital code DOUT does not increase monotonically with respect to the analog voltage VIN.
In order to test whether or not an A/D converter has desired performance according to its specifications, differential nonlinearity (DNL), integral nonlinearity (INL), or the like is measured. FIG. 2 is a block diagram which shows a test system 1002 for an A/D converter according to a comparison technique. An arbitrary waveform generator 1010 supplies an analog voltage VIN having a waveform (ramp waveform) that changes in a stepwise manner to an A/D converter which is a device under test (DUT) 1. Subsequently, a capture unit 1020 captures the relation between the analog voltage VIN and the digital output DOUT of the A/D converter, and detects the analog voltage VIN at which the digital code DOUT changes. With such an arrangement, the conversion characteristics are measured as shown in FIGS. 1A and 1B.
With such a test system 1002, the number of steps of the analog voltage VIN having a ramp waveform is set to be greater than the number of steps (the number of codes) of the A/D converter. Specifically, there is a need to change the analog voltage VIN in increments of steps, the number of which is 8 to 16 times the number of steps of the A/D converter 1. Thus, such a conventional test system 1002 requires a very long test time.
Furthermore, the input voltage range (full scale voltage range) of the A/D converter 1 involves a margin of error. Thus, there is a need to design the full scale voltage range of the analog voltage VIN to be wider than the design value of the input voltage range of the A/D converter 1. This leads to a further increased test time. Such a long test time means that there is an increase in the test cost. Thus, there is a demand for a test system which requires only a short test time.